Three-Dimensional Structure (3DS) integrated circuits (ICs) allows for physical separation of circuits and the control logic onto different layers such that each layer may be separately optimized. Fabrication of 3DS ICs involves aligning and bonding to a common substrate a topside of a second circuit substrate, grinding the backside or exposed surface of the second circuit substrate to a predetermined thickness, and then polishing the surface.
A problem, however, often occurs during the grinding step. The wafer substrate that is to be grinded includes a bevel component that is unsupported during the grinding step of the process. Therefore, whenever pressure from the grinder is applied to thin the wafer substrate, the unsupported component may chip.
Edge chipping is considered a serious problem in the fabrication process since it may result in relatively large portions of the wafer substrate being delaminated. Delamination may potentially lead to down stream processing inefficiencies and/or yield problems on the edge of the substrate.